Working With Us

CryoLogiQ Semiconductors is Hiring Design & Test Engineers / Interns

❑ Who Should Apply
• BTech / MTech in ECE / VLSI
• Only 2025 / 2026 graduates with a strong background in Analog / VLSI / RF
• Hands-on knowledge of Cadence Design Tools / PCB Design Tools
• Experience with on-wafer or chip-level testing

❑ What You’ll Do

• Chip Design & Verification
• Semiconductor Chip Packaging
• PCB Design & Bring-up
• DC & RF Measurements
• Hardware Debugging

❑ Why CryoLogiQ

• DPIIT Deep-Tech certified semiconductor startup focused on Quantum Computing & Defence applications
• Opportunity to work directly with IIT Delhi faculty and researchers at IIT Delhi Research & Innovation Park in Hauz Khas, New Delhi
• Hands-on SOTA hardware development using advanced CMOS technologies

Interested?
Email your detailed resume to team@cryologiq.in